1. Field of the Invention
The present invention relates to the formation of a conduction channel for a semiconductor device, and in particular to the formation of an ultra-thin silicon germanium conduction channel.
2. Discussion of the Related Art
In the development of new MOS (Metal Oxide Semiconductor) technologies, a key aim is to improve the mobility in the channel of the device. To achieve this, the use of materials with an improved mobility when compared to silicon has been considered, for example using materials such as germanium, GaAs, or silicon germanium with or without additional strain.
There is also a desire in current MOS technologies to allow the control of short channel effects. In bulk silicon, this requires the formation of ultra-shallow junctions, for example junctions having thicknesses of less than 10 nanometers for 20 nanometer devices, and this is hard to achieve. Another option is the use of thin silicon films on insulator (typically less than 15 nm) in a fully depleted structure.
In order to produce a silicon germanium device, a full sheet epitaxy of silicon germanium is generally formed on a silicon substrate. However, this technique results in a silicon germanium layer which is too thick, and thus is not compatible with thin body devices.
Another consideration when forming a MOS transistor is the formation of the insulating oxide layer in the gate stack, the thickness of which needs to be accurately controlled.
There is thus a need for a method of forming a silicon germanium channel sufficiently thin to achieve an ultra-shallow junction, and at the same time to allow the precise formation of the insulating layer in the gate stack.